DatasheetsPDF.com

CD4027BCN

Fairchild Semiconductor

Dual J-K Master/Slave Flip-Flop


Description
CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independ...



Fairchild Semiconductor

CD4027BCN

File Download Download CD4027BCN Datasheet


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)