ADSP-21489 SHARC Processor Datasheet

ADSP-21489 Datasheet, PDF, Equivalent


Part Number

ADSP-21489

Description

SHARC Processor

Manufacture

Analog Devices

Total Page 30 Pages
Datasheet
Download ADSP-21489 Datasheet


ADSP-21489
SHARC Processor
ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489
FEATURES
High performance 32-bit/40-bit floating-point processor
optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational
architecture
On-chip memory—5 Mbits on-chip RAM, 4 Mbits on-chip
ROM
Up to 450 MHz operating frequency
Code compatible with all other members of the SHARC family
The ADSP-2148x processors are available with unique audio-
centric peripherals, such as the digital applications
interface, serial ports, precision clock generators, S/PDIF
transceiver, asynchronous sample rate converters, input
data port, and more
For complete ordering information, see Ordering Guide on
Page 69
Qualified for automotive applications
SIMD Core
Instruction
Cache
5 Stage
Sequencer
DAG1/2
Core
Timer
PEx PEy
FLAGx/IRQx/
TMREXP
JTAG THERMAL
DIODE
Block 0
RAM/ROM
Internal Memory
Block 1
RAM/ROM
Block 2
RAM
Block 3
RAM
DMD
64-BIT
S
DMD
64-BIT
Core Bus
PMD
64-BIT
Cross Bar
PMD 64-BIT
EPD BUS 64-BIT
PERIPHERAL BUS
32-BIT
B0D
64-BIT
B1D
64-BIT
B2D
64-BIT
Internal Memory I/F
IOD0 32-BIT
B3D
64-BIT
IOD1
32-BIT
PERIPHERAL BUS
CORE
FLAGS/
PWM3-1
PCG
C-D
TIMER
1-0
TWI
SPI/B UART
IOD0 BUS
S/PDIF PCG
Tx/Rx A-D
ASRC PDAP/ SPORT
3-0 IDP 7-0
7-0
FFT
FIR DTCP/
IIR MTM
SPEP BUS
CORE PWM
WDT FLAGS 3-0
EP
AMI
SDRAM
CTL
DPI Routing/Pins
DPI Peripherals
DAI Routing/Pins
DAI Peripherals
Figure 1. Functional Block Diagram
External Port Pin MUX
Peripherals
External
Port
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
Rev. F
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
©2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

ADSP-21489
ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489
TABLE OF CONTENTS
Features ................................................................. 1
Table of Contents ..................................................... 2
Revision History ...................................................... 2
General Description ................................................. 3
Family Core Architecture ........................................ 4
Family Peripheral Architecture ................................ 7
I/O Processor Features ......................................... 10
System Design .................................................... 11
Development Tools ............................................. 12
Additional Information ........................................ 13
Related Signal Chains .......................................... 13
Pin Function Descriptions ....................................... 14
Specifications ........................................................ 18
Operating Conditions .......................................... 18
Electrical Characteristics ....................................... 19
Absolute Maximum Ratings .................................. 21
ESD Sensitivity ................................................... 21
Maximum Power Dissipation ................................. 21
Timing Specifications ........................................... 22
Output Drive Currents ......................................... 55
Test Conditions .................................................. 55
Capacitive Loading .............................................. 55
Thermal Characteristics ........................................ 56
88-Lead LFCSP_VQ Lead Assignment ......................... 58
100-Lead LQFP_EP Lead Assignment ......................... 60
176-Lead LQFP_EP Lead Assignment ......................... 62
Outline Dimensions ................................................ 66
Surface-Mount Design .......................................... 68
Automotive Products ........................................... 68
Ordering Guide .................................................. 69
REVISION HISTORY
6/2018—Rev. E to Rev. F
Changes to Table 2, ADSP-2148x Family Features ............3
Added Junction Temperature Specification for 88-Lead
LFCSP_VQ Package, Operating Conditions .................. 18
Deleted Nonapplicable TJ Specification for 100-Lead
LQFP_EP, Operating Conditions ................................ 18
Deleted Package Information from Specifications ........... 18
Added Table 55, Thermal Characteristics ...................... 56
Added 88-Lead LFCSP_VQ Lead Assignment ................ 58
Changes to Outline Dimensions ................................. 66
Added Figure 54, Outline Dimensions ......................... 66
Changes to Ordering Guide ....................................... 69
Rev. F | Page 2 of 70 | June 2018


Features SHARC Processor ADSP-21483/ADSP-21486/AD SP-21487/ADSP-21488/ADSP-21489 SUMMARY High performance 32-bit/40-bit floatin g-point processor optimized for high pe rformance audio processing Single-instr uction, multiple-data (SIMD) computatio nal architecture On-chip memory—5 Mbi ts on-chip RAM, 4 Mbits on-chip ROM Up to 450 MHz operating frequency Code com patible with all other members of the S HARC family The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applic ations interface, serial ports, precisi on clock generators, S/PDIF transceiver , asynchronous sample rate converters, input data port, and more For complete ordering information, see Ordering Guid e on Page 66 Qualified for automotive a pplications SIMD Core Instruction Cac he 5 Stage Sequencer DAG1/2 Core Tim er PEx PEy FLAGx/IRQx/ TMREXP JTAG T HERMAL DIODE Block 0 RAM/ROM Internal Memory Block 1 RAM/ROM Block 2 RAM Block 3 RAM DMD 64-BIT S DMD 64-BIT Core Bus PMD 64-BIT Cro.
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