18Mb QUADP (Burst 4) SYNCHRONOUS SRAM
Description
IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2
1Mx18 , 512Kx36 18Mb QUADP (Burst 4) SYNCHRONOUS SRAM
(2.0 Cycle Read Latency)
OCTOBER 2014
FEATURES
DESCRIPTION
512Kx36 and 1Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data
valid window.
Separate independent read and write ports with concurrent read and write operations.
Sy...
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