36Mb QUADP (Burst 2) Synchronous SRAM
Description
IS61QDPB22M18A/A1/A2 IS61QDPB21M36A/A1/A2
2Mx18, 1Mx36 36Mb QUADP (Burst 2) Synchronous SRAM
(2.5 CYCLE READ LATENCY)
DECEMBER 2014
FEATURES
1Mx36 and 2Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline re...
Similar Datasheet