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IS46LR32800G

Part Number	IS46LR32800G
Manufacturer	ISSI
Description	2M x 32Bits x 4Banks Mobile DDR SDRAM
Published	Jun 28, 2016
Detailed Description	IS43LR32800G, IS46LR32800G 2M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32800G is 268,435,456 bits CM...
Datasheet	IS46LR32800G PDF File

Overview

IS43LR32800G, IS46LR32800G 2M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32800G is 268,435,456 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 2,097,152 words x 32 bits.
This product uses a double-data-rate architecture to achieve high-speed operation.
The Data Input/ Output signals are transmitted on a 32-bit bus.
The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations referenced to both rising and falling edges of the clock.
The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth.
All input and output voltage levels are compatible with LVCMOS.
Features • JEDEC standard 1.
8V power supply.
• VDD = 1.
8V, VDDQ = 1.
8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, ...

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