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IS61DDB42M36A

Part Number	IS61DDB42M36A
Manufacturer	Integrated Silicon Solution
Description	72Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM
Published	Jul 25, 2016
Detailed Description	IS61DDB44M18A IS61DDB42M36A 4Mx18, 2Mx36 72Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM JANUARY 2015 FEATURES  2Mx36 and ...
Datasheet	IS61DDB42M36A PDF File

Overview

IS61DDB44M18A IS61DDB42M36A 4Mx18, 2Mx36 72Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM JANUARY 2015 FEATURES  2Mx36 and 4Mx18 configuration available.
 On-chip delay-locked loop (DLL) for wide data valid window.
 Common I/O read and write ports.
 Synchronous pipeline read with late write operation.
 Double Data Rate (DDR) interface for read and write input ports.
 Fixed 4-bit burst for read and write operations.
 Clock stop support.
 Two input clocks (K and K#) for address and control registering at rising edges only.
 Two input clocks (C and C#) for data output control.
 Two echo clocks (CQ and CQ#) that are delivered simultaneously with data.
 +1.
8V core power supply and 1.
5V to1.
8V VDDQ, used with 0.
75V to 0.
9V VREF.
 HSTL input and output interface.
 Registered addresses, write and read controls, byte writes, data in, and data outputs.
 Full data coherency.
 Boundary scan using limited set of JTAG 1149.
1 functions.
 Byte write capability.
 Fine ball grid array (FBGA...

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