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74LVC2G86

NXP
Part Number 74LVC2G86
Manufacturer NXP
Description Dual 2-input EXCLUSIVE-OR gate
Published Sep 29, 2016
Detailed Description 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G8...
Datasheet PDF File 74LVC2G86 PDF File

74LVC2G86
74LVC2G86

Overview
74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev.
11 — 8 April 2013 Product data sheet 1.
General description The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate.
Inputs can be driven from either 3.
3 V or 5 V devices.
This feature allows the use of these devices as translators in a mixed 3.
3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2.
Features and benefits  Wide supply voltage range from 1.
65 V to 5.
5 V  5 V tolerant inputs for interfacing with 5 V logic  High noise immunity  Complies with JEDEC standard:  JESD8-7 (1.
65 V to 1.
95 V)  JESD8-5 (2.
3 V to 2.
7 V)  JESD8B/JESD36 (2.
7 V to 3.
6 V)  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  24 mA output drive (VCC = 3.
0 V)  CMOS low-power consumption  Latch-up performance exceeds 250 mA  Direct interface w...


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