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UT54ACS109E

Aeroflex Circuit Technology
Part Number UT54ACS109E
Manufacturer Aeroflex Circuit Technology
Description Dual J-K Flip-Flops
Published Oct 6, 2016
Detailed Description UT54ACS109E Dual J-K Flip-Flops Septenber 2010 www.aeroflex.com/Logic FEATURES • 0.6μm CRH CMOS Process - Latchup immun...
Datasheet PDF File UT54ACS109E PDF File

UT54ACS109E
UT54ACS109E

Overview
UT54ACS109E Dual J-K Flip-Flops Septenber 2010 www.
aeroflex.
com/Logic FEATURES • 0.
6μm CRH CMOS Process - Latchup immune • High speed • Low power consumption • Wide operating power supply of 3.
0V to 5.
5V • Available QML Q or V processes • 16-lead flatpack DESCRIPTION The UT54ACS109E is a dual J-K positive triggered flip-flop.
A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels.
When preset and clear are inactive (high), data at the J and K input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse.
Following the hold time interval, data at the J and K input can be changed withou...


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