Dual 4-Bit Static Shift Register
Description
CD4015BM CD4015BC Dual 4-Bit Static Shift Register
June 1996
CD4015BM CD4015BC Dual 4-Bit Static Shift Register
General Description
The CD4015BM CD4015BC contains two identical 4-stage serial-input parallel-output registers with independent ‘‘Data’’ ‘‘Clock ’’ and ‘‘Reset’’ inputs The logic level present at the input of each stage is transferred to the out...
National Semiconductor
CD4015BC PDF File
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