12 LVPECL/24 CMOS Output Clock Generator
Description
Data Sheet
12 LVPECL/24 CMOS Output Clock Generator AD9520-5
FEATURES
Low phase noise, phase-locked loop (PLL) Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz 1 differential or 2 single-ended reference inputs Accepts CMOS, LVDS, or LVPECL references to 250 MHz Accepts 16.62 MHz to 33.3 MHz crystal for reference input Optional reference clock doubler Refere...
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