Buffered 24-Bit Sigma-Delta ADC
Description
Data Sheet
FEATURES
Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA max Power-down: 1 μA max
RMS noise: 1.1 μV at 9.5 Hz update rate 19.5-bit p-p resolution (22 bits effective resolution) Integral nonlinearity: 3.5 ppm typical Simultaneous 50 Hz and 60 Hz rejection Internal clock oscillator Rail-to-rail input buffer VDD monitor channel Temperature rang...
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