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CY7C1471BV25

Part Number	CY7C1471BV25
Manufacturer	Cypress Semiconductor
Description	72-Mbit (2 M x 36) Flow-Through SRAM
Published	Mar 13, 2017
Detailed Description	CY7C1471BV25 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture 72-Mbit (2 M × 36/1 M × 72) Flow-Through SRAM...
Datasheet	CY7C1471BV25 PDF File

Overview

CY7C1471BV25 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture 72-Mbit (2 M × 36/1 M × 72) Flow-Through SRAM with NoBL™ Architecture Features ■ No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles ■ Supports up to 133 MHz bus operations with zero wait states ■ Data transfers on every clock ■ Pin compatible and functionally equivalent to ZBT™ devices ■ Internally self timed output buffer control to eliminate the need to use OE ■ Registered inputs for flow through operation ■ Byte Write capability ■ 2.
5-V I/O supply (VDDQ) ■ Fast clock-to-output times ❐ 6.
5 ns (for 133-MHz device) ■ Clock Enable (CEN) pin to enable clock and suspend operation ■ ...

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