CY7C1518KV18 CY7C1520KV18
72-Mbit DDR-II SRAM Two-Word Burst Architecture
72-Mbit DDR-II SRAM Two-Word Burst Architecture
Features
■ 72-Mbit density (4M × 18, 2M × 36) ■ 333 MHz clock for high bandwidth ■ Two-word burst for reducing address bus frequency ■ Double data rate (DDR) interfaces (data transferred at
666 MHz) at 333 MHz ■ Two input clocks (K and K...
