DatasheetsPDF.com

74HC4520-Q100

Part Number	74HC4520-Q100
Manufacturer	NXP
Description	Dual 4-bit synchronous binary counter
Published	Sep 7, 2017
Detailed Description	74HC4520-Q100; 74HCT4520-Q100 Dual 4-bit synchronous binary counter Rev. 1 — 4 December 2014 Product data sheet 1. Ge...
Datasheet	74HC4520-Q100 PDF File

Overview

74HC4520-Q100; 74HCT4520-Q100 Dual 4-bit synchronous binary counter Rev.
1 — 4 December 2014 Product data sheet 1.
General description The 74HC4520-Q100; 74HCT4520-Q100 are dual 4-bit internally synchronous binary counters with two clock inputs (nCP0 and nCP1).
They have buffered outputs from all 4 bit positions (nQ0 to nQ3), and an asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH.
It also advances on the HIGH-to-LOW transition of nCP1 if nCP0 is LOW.
Either nCP0 or nCP1 may be used as the clock input to the counter.
The other clock input may be used as a clock enable input.
A HIGH on nMR resets the counter (nQ0 to ...

Similar Datasheet

74HC4520-Q100 Dual 4-bit synchronous binary counter - NXP
74HC4520-Q100 Dual 4-bit synchronous binary counter - nexperia

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)