1:4 Differential LVDS Fanout Buffer
Description
CY2DL1504
1:4 Differential LVDS Fanout Buffer with Selectable Clock Input
na1:4 Differential LVDS Fanout Buffer with Selectable Clock Input
Features
■ Select one of two differential (LVPECL, LVDS, HCSL, or CML) input pairs to distribute to four LVDS output pairs
■ Translates any single-ended input signal to 3.3 V LVDS levels with resistor bias on INx# input...
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