DDR3 SDRAM
Description
ESMT
DDR3(L) SDRAM
Feature
Interface and Power Supply SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V) SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
JEDEC DDR3(L) Compliant 8n Prefetch Architecture Differential Clock (CK/ CK ) and Data Strobe (DQS/ DQS ) Double-data rate on DQs, DQS and DM
Data Integrity Auto Refresh and Self Refresh Modes
Power Saving Mode Partial Array Self ...
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