Low Skew 1 to 4 Clock Buffer
Description
Low Skew 1 to 4 Clock Buffer
524S
DATASHEET
Description
The 524S is a low skew, single input to four output, clock buffer. The 524S has best in class additive phase Jitter of sub 50 fsec.
IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.
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