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SAME53J19

Microchip
Part Number SAME53J19
Manufacturer Microchip
Description 32-bit ARM Cortex-M4F MCUs
Published Jul 6, 2019
Detailed Description 32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC SAM D5x/E5x Family Features Operating ...
Datasheet PDF File SAME53J19 PDF File

SAME53J19
SAME53J19

Overview
32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC SAM D5x/E5x Family Features Operating Conditions: • 1.
71V to 3.
63V, -40°C to +125°C, DC to 100 MHz • 1.
71V to 3.
63V, -40°C to +105°C, DC to 120 MHz • 1.
71V to 3.
63V, -40°C to +85°C, DC to 120 MHz Core: 120 MHz Arm Cortex-M4 • 403 CoreMark® at 120 MHz • 4 KB combined instruction cache and data cache • 8-Zone Memory Protection Unit (MPU) • Thumb®-2 instruction set • Embedded Trace Module (ETM) with instruction trace stream • Core Sight Embedded Trace Buffer (ETB) • Trace Port Interface Unit (TPIU) • Floating Point Unit (FPU) Memories • 1 MB/512 KB/256 KB in-system self-programmable Flash with: – Error Correction Code (ECC) – Dual bank with Read-While-Write (RWW) support – EEPROM hardware emulation (SmartEEPROM) • 128 KB, 192 KB, 256 KB SRAM main memory – 64 KB, 96 KB, 128 KB of Error Correction Code (ECC) RAM option • Up to 4 KB of Tightly Coupled Memory (TCM) • Up to 8 KB additional SRAM – Can be retained in backup mode • Eight 32-bit backup registers System • Power-on Reset (POR) and Brown-out detection (BOD) • Internal and external clock options • External Interrupt Controller (EIC) • 16 external interrupts • One non-maskable interrupt • Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface Power Supply • Idle, Standby, Hibernate, Backup, and Off sleep modes Complete Data Sheet © 2023 Microchip Technology Inc.
and its subsidiaries DS60001507L - 1 SAM D5x/E5x Family • SleepWalking peripherals • Battery backup support • Embedded Buck/LDO regulator supporting on-the-fly selection High-Performance Peripherals • 32-channel Direct Memory Access Controller (DMAC) – Built-in CRC with memory CRC generation/monitor hardware support • Up to two SD/MMC Host Controller (SDHC) – Up to 50 MHz operation – 4-bit or 1-bit interface – Compatibility with SD and SDHC memory card specification version 3.
01 – Compatibility with SDIO specification version 3.
0 – Compliant with JDEC spec...


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