Dual D-Type Positive-Edge-Triggered Flip-Flop
Description
74AC11074 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP
WITH CLEAR AND PRESET
SCAS499A − DECEMBER 1986 − REVISED APRIL 1996
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (D) and ...
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