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74AC11011

TRIPLE 3-INPUT POSITIVE-AND GATES

Description

Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs descr...

Texas Instruments

74AC11011 PDF File

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