Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for
Nine Data Lines
Cascadable for n-Bits Parity Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
t EPIC (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity
at 125°C
Packa...