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EL4584

Renesas
Part Number EL4584
Manufacturer Renesas
Description Horizontal Genlock
Published May 30, 2020
Detailed Description EL4584 Horizontal Genlock, 4FSC The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but a...
Datasheet PDF File EL4584 PDF File

EL4584
EL4584

Overview
EL4584 Horizontal Genlock, 4FSC The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz.
In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it.
The reference signal is a horizontal sync signal, TTL/CMOS format, which can be easily derived from an analog composite video signal with the EL4583 Sync Separator.
An input signal to “coast” is provided for applications where periodic disturbances are present in the reference video timing, such as VTR head switching.
The Lock detector output indicates correct lock.
The divider ratio is four ratios for NTSC and four similar ratios for the PAL video timing standards, by external selection of three control pins.
These four ratios have been selected for common video applications including 4FSC, 3FSC, 13.
5MHz (CCIR 601 format) and square picture elements used ...


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