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AD7395

Analog Devices
Part Number AD7395
Manufacturer Analog Devices
Description +3 V/ Dual/ Serial Input 12-/10-Bit DACs
Published Mar 23, 2005
Detailed Description a FEATURES Micropower: 100 ␮ A/DAC 0.1 ␮A Typical Power Shutdown Single-Supply +2.7 V to +5.5 V Operation Compact 1.1 mm...
Datasheet PDF File AD7395 PDF File

AD7395
AD7395


Overview
a FEATURES Micropower: 100 ␮ A/DAC 0.
1 ␮A Typical Power Shutdown Single-Supply +2.
7 V to +5.
5 V Operation Compact 1.
1 mm Height TSSOP-14 Package AD7394/12-Bit Resolution AD7395/10-Bit Resolution Serial Interface with Schmitt Trigger Inputs APPLICATIONS Automotive Output Span Voltage Portable Communications Digitally Controlled Calibration PC Peripherals CS CLK EN +3 V, Dual, Serial Input 12-/10-Bit DACs AD7394/AD7395 FUNCTIONAL BLOCK DIAGRAM VDD VREF OP AMP A DAC A VOUTA R E D G A I C S T A E R D S H I F T R E G I S T E R P R 12 SDI (DATA) AD7394/AD7395 D R E D G A I C S T B E R P R OP AMP B DAC B VOUTB LDA GENERAL DESCRIPTION LDB The AD7394/AD7395 family of dual, 12-/10-bit, voltage output digital-to-analog converters is designed to operate from a single +3 V supply.
Built using a CBCMOS process, this monolithic DAC offers the user low cost and ease of use in single-supply +3 V systems.
Operation is guaranteed over the supply voltage range of +2.
7 V to +5.
5 V making this device ideal for battery operated applications.
The full-scale output voltage is determined by the applied external reference input voltage, VREF.
The rail-to-rail VREF input to VOUT outputs allows for a full-scale voltage set equal to the positive supply VDD or any value in between.
A doubled-buffered serial data interface offers high speed, microcontroller compatible inputs using serial-data-in (SDI), clock (CLK) and load strobe (LDA + LDB) pins.
A chip-select (CS) pin simplifies connection of multiple DAC packages by enabling the clock input when active low.
Additionally, an RS input sets the output to zero scale or to 1/2 scale based on the logic level applied to the MSB pin.
The power shutdown pin, SHDN, reduces power dissipation to nanoamp current levels.
All digital inputs contain Schmitt-triggered logic levels to minimize power dissipation and prevent false triggering on the clock input.
Both parts are offered in the same pinout to allow users to select the amount of resolution appr...



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