TRIPLE 3-INPUT POSITIVE-NOR GATES
Description
Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Pl...
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