DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
Description
74ACT11074
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SCAS498A – DECEMBER 1986 – REVISED APRIL 1996
D Inputs Are TTL-Voltage Compatible D Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity
at 125°C
D Package Option...
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