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FM34W02UE

Part Number	FM34W02UE
Manufacturer	Fairchild Semiconductor
Description	2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect
Published	Mar 30, 2005
Detailed Description	FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect May 2001 FM34W02U 2K-Bit Sta...
Datasheet	FM34W02UE PDF File

Overview

FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect May 2001 FM34W02U 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect Designed with Permanent Write-Protection for First 128 Bytes for Serial Presence Detect Application on Memory Modules (PC100/PC133 Compliant) General Description The FM34W02U is 2048 bits of CMOS non-volatile electrically erasable memory.
This device is specifically designed to support Serial Presence Detect circuitry in memory modules.
This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s).
The contents of the non-volatile memory allows the CPU to determine the capacity of the module and the electrical characteristics of the memory devices it contains.
This will enable "plug and play" capability as the module is read and PC main memory resources utilized through the memory controller.
The first 128 bytes of the memory of the FM34W02U can be permanently Write Protected by writing to the "WRITE PROTECT" Register.
Write Protect implementation details are described under the section titled Addressing the WP Register.
The FM34W02U is available in a JEDEC standard TSSOP package for low profile memory modules for systems requiring efficient space utilization such as in a notebook computer.
Two options are available: L - Low Voltage and LZ - Low Power, allowing the part to be used in systems where battery life is of primary importance.
Features I PC100/PC133 Compliant I Extended Operating Voltage: 2.
7V-5.
5V I Software Write-Protection for first 128 bytes I Hardware Write-Protection for entire memory array I 200 µA active current typical – 1.
0 µA standby current typical (L) – 0.
1 µA standby current typical (LZ) I IIC compatible interface – Provides bidirectional data transfer protocol I Sixteen byte page write mode – Minimizes total write time per byte I Self tim...

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