Clarification to the Serial I/O Control Register Description for the DSP1620/27/28/29 Devices
Description
Data Sheet March 2000
DSP1629 Digital Signal Processor
1 Features
s s
Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency. On-chip, programmable, PLL clock synthesizer. 10 ns and 16.7 ns instruction cycle times at 3.0 V, and 19.2 ns and 12.5 ns instruction cycle times at 2.7 V, respectively. Mask-programmab...
