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K9F5616U0B-HIB0

Part Number	K9F5616U0B-HIB0
Manufacturer	Samsung semiconductor
Description	32M x 8 Bit / 16M x 16 Bit NAND Flash Memory
Published	Apr 7, 2005
Detailed Description	K9F5608U0B-VCB0,VIB0,FCB0,FIB0 K9F5608Q0B-DCB0,DIB0,HCB0,HIB0 K9F5608U0B-YCB0,YIB0,PCB0,PIB0 K9F5608U0B-DCB0,DIB0,HCB0,H...
Datasheet	K9F5616U0B-HIB0 PDF File

Overview

K9F5608U0B-VCB0,VIB0,FCB0,FIB0 K9F5608Q0B-DCB0,DIB0,HCB0,HIB0 K9F5608U0B-YCB0,YIB0,PCB0,PIB0 K9F5608U0B-DCB0,DIB0,HCB0,HIB0 K9F5616Q0B-DCB0,DIB0,HCB0,HIB0 K9F5616U0B-YCB0,YIB0,PCB0,PIB0 K9F5616U0B-DCB0,DIB0,HCB0,HIB0 FLASH MEMORY Document Title 32M x 8 Bit , 16M x 16 Bit NAND Flash Memory Revision History Revision No.
History 0.
0 0.
1 Initial issue.
At Read2 operation in X16 device : A3 ~ A7 are Don’ t care ==> A3 ~ A7 are "L" 1.
IOL(R/B) of 1.
8V device is changed.
-min.
Value: 7mA -->3mA -typ.
Value: 8mA -->4mA 2.
AC parameter is changed.
tRP(min.
) : 30ns --> 25ns 3.
WP pin provides hardware protection and is recommended to be kept at VIL during power-up and power-down and recovery time of minimum 1µs is required before internal circuit gets ready for any command sequences as shown in Figure 15.
---> WP pin provides hardware protection and is recommended to be kept at VIL during power-up and power-down and recovery time of minimum 10µs is required before internal circuit gets ready for any command sequences as shown in Figure 15.
0.
3 1.
X16 TSOP1 pin is changed.
: #36 pin is changed from VccQ to N.
C .
1.
In X16 device, bad block information location is changed from 256th byte to 256th and 261th byte.
2.
tAR1, tAR2 are merged to tAR.
(page 12) (before revision) min.
tAR1 = 20ns , min.
tAR2 = 50ns (after revision) min.
tAR = 10ns 3.
min.
tCLR is changed from 50ns to 10ns.
(page12) 4.
min.
tREA is changed from 35ns to 30ns.
(page12) 5.
min.
tWC is changed from 50ns to 45ns.
(page12) 6.
Unique ID for Copyright Protection is available -The device includes one block sized OTP(One Time Programmable), which can be used to increase system security or to provide identification capabilities.
Detailed information can be obtained by contact with Samsung.
7.
tRHZ is divide into tRHZ and tOH.
(page 12) - tRHZ : RE High to Output Hi-Z - tOH : RE High to Output Hold 8.
tCHZ is divide into tCHZ and tOH.
(page 12) - tCHZ : CE High to Output Hi-Z - tOH : CE High to Output Hold Draft Dat...

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K9F5616U0B-HIB0 32M x 8 Bit / 16M x 16 Bit NAND Flash Memory - Samsung semiconductor

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