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74LS74

Fairchild Semiconductor
Part Number 74LS74
Manufacturer Fairchild Semiconductor
Description Dual Positive-Edge-Triggered D Flip-Flops
Published Apr 23, 2005
Detailed Description DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs August 1986 Revised Ma...
Datasheet PDF File 74LS74 PDF File

74LS74
74LS74

Overview
DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs.
The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse.
The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock.
The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated.
A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
Ordering Code: Order Number DM74LS74AM DM74LS85ASJ DM74LS74AN Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.
150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300 Wide Devices also available in Tape and Reel.
Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table Inputs PR L H L H H H CLR H L L H H H CLK X X X ↑ ↑ L D X X X H L X Q H L H L Q0 Outputs Q L H L H Q0 H (Note 1) H (Note 1) H = HIGH Logic Level X = Either LOW or HIGH Logic Level L = LOW Logic Level ↑ = Positive-going Transition Q0 = The output logic level of Q before the indicated input conditions were established.
Note 1: This configuration is nonstable; that is, it will not persist when either the preset and/or clear inputs return to their inactive (HIGH) level.
© 2000 Fairchild Semiconductor Corporation DS006373 www.
fairchildsemi.
com DM74LS74A Absolute Maximum Ratings(Note 2) Supply Voltage Input Voltage Operating Free Air Temperature Range Stor...


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