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74LV595

Philips
Part Number 74LV595
Manufacturer Philips
Description 8-bit serial-in/serial or parallel-out shift register
Published Apr 23, 2005
Detailed Description INTEGRATED CIRCUITS 74LV595 8-bit serial-in/serial or parallel-out shift register with output latches (3-State) Product...
Datasheet PDF File 74LV595 PDF File

74LV595
74LV595

Overview
INTEGRATED CIRCUITS 74LV595 8-bit serial-in/serial or parallel-out shift register with output latches (3-State) Product specification IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Philips Semiconductors Product specification 8-bit serial-in/serial or parallel-out shift register with output latches (3-State) 74LV595 FEATURES • Optimized for Low Voltage applications: 1.
0V to 3.
6V • Accepts TTL input levels between VCC = 2.
7V and VCC = 3.
6V • Typical VOLP (output ground bounce) < 0.
8V at VCC = 3.
3V, • Typical VOHV (output VOH undershoot) > 2V at VCC = 3.
3V, • 8-bit serial input • 8-bit serial or parallel output • Storage register with 3-State outputs • Shift register with direct clear • Output capability: – parallel outputs; bus driver – serial output; standard Tamb = 25°C Tamb = 25°C APPLICATIONS • Serial-to-parallel data conversion • Remote control holding register DESCRIPTION The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595.
The74LV595 is an 8-stage serial shift register with a storage register and 3-State outputs.
The shift register and storage register have separate clocks.
Data is shifted on the positive-going transitions of the SHCP input.
The data in each register is transferred to the storage register on a positive-going transition of the STCP input.
If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
The shift register has a serial input (DS) and a serial standard output (Q7’) all for cascading.
It is also provided with asynchronous reset (active LOW) for all 8 shift register stages.
The storage register has 8 parallel 3-State bus driver outputs.
Data in the storage register appears at the output whenever the output enable input (OE) is LOW.
• ICC category: MSI QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr =tf v2.
5 ns SYMBOL PARAMETER Propagation delay SHCP to Q7’ STCP to Q7’ MR to Q7’ Maximum clock frequency SHCP, STCP...


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