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74LVT162373

NXP
Part Number 74LVT162373
Manufacturer NXP
Description 3.3V LVT 16-bit transparent D-type latch
Published Mar 22, 2005
Detailed Description INTEGRATED CIRCUITS 74LVT162373 3.3 V LVT 16-bit transparent D-type latch with 30 Ω termination resistors (3-State) Pro...
Datasheet PDF File 74LVT162373 PDF File

74LVT162373
74LVT162373

Overview
INTEGRATED CIRCUITS 74LVT162373 3.
3 V LVT 16-bit transparent D-type latch with 30 Ω termination resistors (3-State) Product specification IC23 Data Handbook 1999 Sep 23 Philips Semiconductors Philips Semiconductors Product specification 3.
3 V LVT 16-bit transparent D-type latch with 30 Ω termination resistors (3-State) 74LVT162373 FEATURES • 16-bit transparent latch • 3-State buffers • Output capability: +12 mA / –12 mA • TTL input and output switching levels • Input and output interface capability to systems at 5 V supply • Bus-hold data inputs eliminate the need for external pull-up • Live insertion/extraction permitted • Outputs include series resistance of 30 Ω making external • Power-up reset • Power-up 3-State • No bus current loading when output is tied to 5 V bus • Latch-up protection exceeds 500 mA per JEDEC Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model resistors unnecessary resistors to hold unused inputs DESCRIPTION The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.
3 V.
This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs.
The device can be used as two 8-bit latches or one 16-bit latch.
When Latch Enable (LE) input is High, the Q outputs follow the data (D) inputs.
When Latch Enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition.
The 74LVT162373 is designed with 30 Ω series resistance in both the High and Low states of the output.
This design reduces the noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters.
QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay nDx to nQx Input capacitance Output capacitance Total supply current CL = 50 pF; VCC = 3.
3 V VI = 0 V or 3.
0 V Outputs disabled; VO = 0 V or 3.
0 V Outputs disabled; VCC = 3.
6 V CONDITIONS Tamb = 25 °C TYPICAL 3.
0 3 9 ...


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