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DG485

Vishay Siliconix
Part Number DG485
Manufacturer Vishay Siliconix
Description Octal Analog Switch Array
Published Jun 3, 2005
Detailed Description DG485 Vishay Siliconix Octal Analog Switch Array FEATURES D D D D D D Low On-Resistance: 55 W Rail-to-Rail Analog Inpu...
Datasheet PDF File DG485 PDF File

DG485
DG485


Overview
DG485 Vishay Siliconix Octal Analog Switch Array FEATURES D D D D D D Low On-Resistance: 55 W Rail-to-Rail Analog Input Range Serial Interface Low-Power—PD: 35 nW TTL and CMOS Compatible Any Combination of 8 SPST to the Output D High Speed—tON: 170 ns BENEFITS D Low Signal Distortion D Devices Can Be Chained for System Expansion D Reduced Board Space D Reduced Switch Errors D Reduced Power Supply Requirements D Simple Interfacing APPLICATIONS D Audio Switching and Routing D Audio Teleconferencing D Data Acquisition and Industrial Process Control D Battery Powered Remote Systems D Automotive, Avionics and ATE Systems D Summing Amplifiers DESCRIPTION The DG485 is an analog switch array consisting of eight SPST switches connected to a common output.
This device may be used as an 8-channel multiplexer in serial control applications.
Any, all or none of the eight switches may be closed at any given time.
Combining low on-resistance (rDS(on) 55 W, typ.
) and fast switching (tON: 170 ns, typ.
), the DG485 is ideally suited for data acquisition, process control, communication, and avionic applications.
serial output (DOUT) allow daisy chaining of multiple arrays for large systems.
Built on the Vishay Siliconix high voltage silicon gate process the DG485 has a wide 44-V power supply voltage rating.
An epitaxial layer prevents latchup.
Control data is input serially into the shift register with each clock pulse.
The shift register contents can be latched-in (via LD) at any point into an octal latch which in turn controls all switches.
RS resets the shift register, forcing all latch inputs to a low condition (all switches off).
The serial input (DIN) and Each channel conducts equally well in either direction when on and blocks up to rail-to-rail voltages when off.
For additional information please refer to application note AN204.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION Dual-In-Line LD VL S4 S3 S2 S1 V+ DIN CLK RS GND D S5 S6 S7 S8 V– DOUT S4 S3 S2 S1 V+ 4 5 6 7 ...



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