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DS42585

Part Number	DS42585
Manufacturer	AMD
Description	MCP Flash Memory and SRAM
Published	Aug 7, 2005
Detailed Description	PRELIMINARY DS42585 Stacked Multi-Chip Package (MCP) Flash Memory and SRAM Am29DL324D Bottom Boot 32 Megabit (4 M x 8-B...
Datasheet	DS42585 PDF File

Overview

PRELIMINARY DS42585 Stacked Multi-Chip Package (MCP) Flash Memory and SRAM Am29DL324D Bottom Boot 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.
0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM DISTINCTIVE CHARACTERISTICS MCP Features s Power supply voltage of 2.
7 to 3.
3 volt s High performance — 85 ns maximum access time SOFTWARE FEATURES s Data Management Software (DMS) — AMD-supplied software manages data programming and erasing, enabling EEPROM emulation — Eases sector erase limitations s Package — 73-Ball FBGA s Supports Common Flash Memory Interface (CFI) s Erase Suspend/Erase Resume — Suspends erase operations to allow programming in same bank s Operating Temperature — –25°C to +85°C Flash Memory Features ARCHITECTURAL ADVANTAGES s Simultaneous Read/Write operations — Data can be continuously read from one bank while executing erase/program functions in other bank — Zero latency between read and write operations s Data# Polling and Toggle Bits — Provides a software method of detecting the status of program or erase cycles s Unlock Bypass Program command — Reduces overall programming time when issuing multiple program command sequences HARDWARE FEATURES s Any combination of sectors can be erased s Ready/Busy# output (RY/BY#) — Hardware method for detecting program or erase cycle completion s Secured Silicon (SecSi) Sector: Extra 64 KByte sector — Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function.
— Customer lockable: Can be read, programmed, or erased just like other sectors.
Once locked, data cannot be changed s Hardware reset pin (RESET#) — Hardware method of resetting the internal state machine to reading array data s Zero Power Operation — Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero s WP#/ACC input pin — Write protect (WP#) funct...

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