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MC68HC908GR48A

Freescale Semiconductor
Part Number MC68HC908GR48A
Manufacturer Freescale Semiconductor
Description (MC68HC908GR32A/48A/60A) Microcontrollers
Published Dec 8, 2005
Detailed Description MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A Data Sheet www.DataSheet4U.com M68HC08 Microcontrollers MC68HC908GR60A R...
Datasheet PDF File MC68HC908GR48A PDF File

MC68HC908GR48A
MC68HC908GR48A


Overview
MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A Data Sheet www.
DataSheet4U.
com M68HC08 Microcontrollers MC68HC908GR60A Rev.
5 04/2007 freescale.
com MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current.
Your printed copy may be an earlier revision.
To verify you have the latest information available, refer to: http://freescale.
com/ Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
This product incorporates SuperFlash® technology licensed from SST.
© Freescale Semiconductor, Inc.
, 2004, 2006, 2007.
All rights reserved.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev.
5 Freescale Semiconductor 3 Revision History The following revision history table summarizes changes contained in this document.
For your convenience, the page number designators have been linked to the appropriate location.
Revision History Date April, 2004 July, 2004 Revision Level N/A 1 Initial release 9.
7.
3 Keyboard Interrupt Polarity Register — Corrected description of KBIP7–KBIP0.
Table 13-6.
ESCI LIN Control Bits — Corrected Functionality definitions June, 2005 2 13.
9.
1 ESCI Arbiter Control Register — Corrected definition for ACLK bit.
13.
9.
3 Bit Time Measurement — Corrected description of ACLK bit.
March, 2006 3 10.
5 Clock Generator Module (CGM) — Updated description to remove erroneous information.
Added 1.
5.
15 Unused Pin Termination 12.
1 Introduction — Replaced note Table 13-6.
ESCI LIN Control Bits — Corrected functionality column.
The following sections were updated to show that a break interrupt inhibits input captures: 17.
6 TIM1 During Break Interrupts 18.
6 TIM2 During Break Interrupts 19.
2.
1.
2 TIM During Break Interrupts Figure 19-10.
Normal Monitor Mode Circuit and Figure 19-11.
Forced Monitor Mode — Changed capacitor values 20.
5 5.
0-Vdc Electrical Characteristics — Updated minimum value for low-voltage inhibit, ...



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