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NJU3754

New Japan Radio
Part Number NJU3754
Manufacturer New Japan Radio
Description 11-BIT PARALLEL TO SERIAL CONVERTER
Published Dec 25, 2006
Detailed Description NJU3754 11-BIT PARALLEL TO SERIAL CONVERTER  GENERAL DESCRIPTION The NJU3754 is an 11-bit parallel to serial converte...
Datasheet PDF File NJU3754 PDF File

NJU3754
NJU3754

Overview
NJU3754 11-BIT PARALLEL TO SERIAL CONVERTER  GENERAL DESCRIPTION The NJU3754 is an 11-bit parallel to serial converter especially applying to MCU input port expander.
It can operate from 2.
7V to 5.
5V.
The NJU3754 requires only 3-port of MCU for data transmission and realizes the effective input port assignment.
The status of the input ports is output through a latch circuit, a shift register and a 3-state buffer as the serial data synchronizing with the serial clock.
The hysteresis input circuit of the serial clock terminal realizes 5MHz operation.
Furthermore, pull-up resistors on chip of P0 to P10 terminals reduce external components for key-scan circuit, etc.
 PACKAGE OUTLINE NJU3754V  FEATURES  11-Bit Parallel In Serial Out  3-line Serial Interface Output  Hysteresis Input 0.
5V typ at 5V  Operating Voltage 2.
7 to 5.
5V  C-MOS Technology  Package Outline SSOP16  BLOCK DIAGRAM P0 P1 P2 VSS  PIN CONFIGURATION P0 1 P1 2 P2 3 P3 4 P4 5 P5 6 P6 7 VSS 8 16 15 14 13 12 11 10 9 VDD SO VDD CE CLK SO P10 P9 P8 P7 Latch Circuit Shift Register P9 P10 Control Circuit CE CLK Ver.
2014-08-21 -1- NJU3754  TERMINAL DESCRIPTION No.
SYMBOL I/O 1 P0 I 2 P1 I 3 P2 I 4 P3 I 5 P4 I 6 P5 I 7 P6 I 8 VSS 9 P7 I 10 P8 I 11 P9 I 12 P10 I 13 SO O 14 CLK I 15 CE I 16 VDD - FUNCTION Parallel Data Input Terminals (with pull-up resistors) Ground Parallel Data Input Terminals (with pull-up resistors) Serial Data Output Terminal Serial Clock Input Terminal Chip Enable Input Terminal Power Supply Terminal (2.
7 to 5.
5V)  FUNCTIONAL DESCRIPTION At the falling edge of CE terminal, the status of P0 to P10 terminal is latched and transferred to the shift register.
At the mean time, the P0 data is output from SO terminal.
While CE terminal is “L”, the data from P1 to P10 in the shift register are synchronized with the falling edge of CLK terminal and output from SO terminal.
When CE terminal is “H”, SO terminal is high impedance.
Note 1) If t...


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