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K6F1616U6M

Samsung semiconductor
Part Number K6F1616U6M
Manufacturer Samsung semiconductor
Description 1M x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Published Jan 27, 2007
Detailed Description www.DataSheet4U.com Preliminary K6F1616U6M Family Document Title 1M x16 bit Super Low Power and Low Voltage Full CMOS ...
Datasheet PDF File K6F1616U6M PDF File

K6F1616U6M
K6F1616U6M

Overview
www.
DataSheet4U.
com Preliminary K6F1616U6M Family Document Title 1M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM CMOS SRAM Revision History Revision No.
History 0.
0 0.
1 Initial draft Revise - Change package type : from FBGA to TBGA Draft Date August 22, 2000 November 21, 2000 Remark Preliminary Preliminary The attached datasheets are provided by SAMSUNG Electronics.
SAMSUNG Electronics CO.
, LTD.
reserve the right to change the specifications and products.
SAMSUNG Electronics will answer to yourquestions about device.
If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 0.
1 November 2000 Preliminary K6F1616U6M Family FEATURES • Process Technology: Full CMOS • Organization: 1M x16 • Power Supply Voltage: 2.
7~3.
3V • Low Data Retention Voltage: 1.
5V(Min) • Three state output • Package Type: 48-TBGA-9.
00x12.
00 CMOS SRAM GENERAL DESCRIPTION The K6F1616U6M families are fabricated by SAMSUNG′s advanced full CMOS process technology.
The families support industrial operating temperature ranges and have chip scale package for user flexibility of system design.
The families also support low data retention voltage for battery back-up operation with low data retention current.
1M x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM PRODUCT FAMILY Power Dissipation Product Family K6F1616U6M-F Operating Temperature Industrial(-40~85°C) Vcc Range 2.
7~3.
3V Speed 551)/70ns Standby (ISB1, Typ.
) 2µ A Operating (ICC1, Max) 4mA PKG Type 48-TBGA-9.
00x12.
00 1.
The parameter is measured with 30pF test load.
2.
Typical value are measured at VCC=3.
0V, TA=25°C and not 100% tested.
PIN DESCRIPTION 1 2 3 4 5 6 FUNCTIONAL BLOCK DIAGRAM Clk gen.
Precharge circuit.
A LB OE A0 A1 A2 CS2 Vcc Vss B I/O9 UB A3 A4 CS1 I/O1 Row Addresses C Row select I/O10 I/O11 A5 A6 I/O2 I/O3 Memory Cell Array D Vss I/O12 A17 A7 I/O4 Vcc Data cont Data cont Data cont I/O Circuit Column select E Vcc I/O13 Vss A16 I/...


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