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MC74HC174A

ON Semiconductor
Part Number MC74HC174A
Manufacturer ON Semiconductor
Description Hex D Flip-Flop
Published Apr 10, 2007
Detailed Description MC74HC174A Hex D Flip-Flop with Common Clock and Reset High−Performance Silicon−Gate CMOS The MC74HC174A is identical i...
Datasheet PDF File MC74HC174A PDF File

MC74HC174A
MC74HC174A

Overview
MC74HC174A Hex D Flip-Flop with Common Clock and Reset High−Performance Silicon−Gate CMOS The MC74HC174A is identical in pinout to the LS174.
The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device consists of six D flip−flops with common Clock and Reset inputs.
Each flip−flop is loaded with a low−to−high transition of the Clock input.
Reset is asynchronous and active−low.
Features • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.
0 to 6.
0 V • Low Input Current: 1.
0 mA • In Compliance with the Requirements Defined by JEDEC Standard No.
7 A • Chip Complexity: 162 FETs or 40.
5 Equivalent Gates • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.
com 16 1 16 1 16 1 MARKING DIAGRAMS 16 PDIP−16 N SUFFIX CASE 648 MC74HC174AN AWLYYWWG 1 16 SOIC−16 D SUFFIX CASE 751B HC174AG AWLYWW 1 16 TSSOP−16 DT SUFFIX CASE 948F HC 174A ALYWG G 1 A L, WL Y, YY W, WW G or G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012 1 July, 2012 − Rev.
12 Publication Order Number: MC74HC174A/D RESET 1 Q0 2 D0 3 D1 4 Q1 5 D2 6 Q2 7 GND 8 16 VCC 15 Q5 14 D5 13 D4 12 Q4 11 D3 10 Q3 9 CLOCK Figure 1.
Pin Assignment MC74HC174A D0 3 D1 4 DATA D2 6 INPUTS D3 11 D4 13 D5 14 CLOCK 9 RESET 1 2 Q0 5 Q1 7 Q2 10 Q3 12 Q4 15 Q5 NONINVERTING OUTPUTS PIN 16 = VCC PIN 8 = GND Figure 2.
Logic Diagram FUNCTION TABLE Inputs Reset Clock L X H H H L H Output D Q X L H H L L X No Change X No Change DESIG...


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