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IC61C1024

ICS
Part Number IC61C1024
Manufacturer ICS
Description 128K x 8 HIGH-SPEED CMOS STATIC RAM
Published Apr 30, 2007
Detailed Description IC61C1024 IC61C1024L Document Title 128K x 8 High-Speed SRAM Revision History Revision No 0A 0B History Initial Draft ...
Datasheet PDF File IC61C1024 PDF File

IC61C1024
IC61C1024


Overview
IC61C1024 IC61C1024L Document Title 128K x 8 High-Speed SRAM Revision History Revision No 0A 0B History Initial Draft Revise typo on page 6 and page 8 Draft Date March 13,2001 October 18,2001 Remark www.
DataSheet4U.
com The attached datasheets are provided by ICSI.
Integrated Circuit Solution Inc reserve the right to change the specifications and products.
ICSI will answer to your questions about device.
If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001 1 IC61C1024 IC61C1024L 128K x 8 HIGH-SPEED CMOS STATIC RAM FEATURES • High-speed access time: 12, 15, 20, 25 ns • Low active power: 600 mW (typical) • Low standby power: 500 µW (typical) CMOS standby • Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 5V (±10%) power supply • Low power version available: IC61C1024L • Commercial and industrial temperature ranges available DESCRIPTION The ICSI IC61C1024 and IC61C1024L are very high-speed, low power, 131,072-word by 8-bit CMOS static RAMs.
They are fabricated using ICSI 's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.
When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2.
The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IC61C1024 and IC61C1024L are available in 32-pin 300mil SOJ, and 8*20mm TSOP-1, and 8*13.
4mm TSOP-1 packages.
FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 512 x 2048 MEMORY ARRAY VCC GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE1 CE2 OE WE CONTROL CIRCUIT ICSI reserves the right to make changes to its produc...



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