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74LS109A

Part Number	74LS109A
Manufacturer	ON Semiconductor
Description	LOW POWER SCHOTTKY
Published	Nov 16, 2007
Detailed Description	www.DataSheet4U.com SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed comp...
Datasheet	74LS109A PDF File

Overview

www.
DataSheet4U.
com SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed completely independent transition clocked JK flip-flops.
The clocking operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
http://onsemi.
com MODE SELECT – TRUTH TABLE INPUTS OPERATING MODE SD Set Reset (Clear) *Undetermined Load “1” (Set) Hold Toggle Load “0” (Reset) * L H L H H H H CD H L L H H H H J X X X h l h l K X X X h h l l Q H L H H q q L Q L H H L q q H OUTPUTS LOW POWER SCHOTTKY 16 1 Both outputs will be HIGH while both SD and CD are LOW, but the outp...

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