DatasheetsPDF.com

UXC20P

Centellax
Part Number UXC20P
Manufacturer Centellax
Description DC-20GHz Programmable Binary Prescaler
Published Feb 9, 2008
Detailed Description www.DataSheet4U.com UXC20P - Datasheet CENTELLAX DC - 20 GHz Programmable Binary Prescaler Features • • • • • • • Wid...
Datasheet PDF File UXC20P PDF File

UXC20P
UXC20P


Overview
www.
DataSheet4U.
com UXC20P - Datasheet CENTELLAX DC - 20 GHz Programmable Binary Prescaler Features • • • • • • • Wide Operating Range: DC - 20GHz Low SSB Phase Noise: -153 dBc @ 10kHz Large Output Swings: >1 Vppk/side Single-Ended and/or Differential Operation Low Power Consumption: 0.
6W 4x4 QFN Package 3 Dividers-in-One 24 pin Quad Flat No Lead (QFN) 4x4 mm pkg, 0.
5mm pad pitch JEDEC MO-220 Compliant Marking Information: UXC20P = Device Part Number YYDD = Year & Work Week XXXX = Reserved for future use Description The UXC20P is a low noise programmable prescaler featuring either divide-by-2, divide-by-4, or divide-by-8 division ratios.
The device features differential inputs and outputs, adjustable output swing and high input sensitivity.
The control inputs are CMOS and LVTTL compatible.
The UXC20P is packaged in a 24 pin, 4mm x 4mm leadless surface mount package.
Application The UXC20P can be used as a general purpose, fixed modulus prescaler in high frequency PLLs.
The low phase noise of the divider makes it ideal for generating low jitter, synchronous clocks in telecom applications.
Key Specifications (T=25 ºC) Vee = -3.
3V, Iee = 165mA, Zo = 50Ω Parameter Description Minimum Fin (GHz) Input Frequency DC* Pin (dBm) Nominal Input Power -10 Pout (dBm) Nominal Output Power -5 £(dBc/Hz) SSB Phase Noise @10kHz Offset Pdc (mW) DC Power Dissipation Pspitback (dBm) Freq/2 Power Spitback @Input Pfundamental (dBm) Fundamental Feedthru @Output *Low frequency limit dependent on input edge speed CENTELLAX • Web: http://www.
centellax.
com/ • Email: sales@centellax.
com • Tel: 866.
522.
6888 • Fax: 707.
568.
7647 Specifications subject to change without notice.
Copyright © 2001-2006 Centellax, Inc.
Printed in USA.
17 Aug 2006.
Typical 0 +5 -153 550 TBD TBD Maximum 20 +10 - PAGE 1 www.
DataSheet4U.
com Min/Max Single-Ended Power Input Sensitivity Window Divide-by-2 Output Power, 3rd Harmonic & Input Feedthru -1V 50 ps/DIV, 150mV/DIV SSB Phase Noise for Binary Divide-by-8...



Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)