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XCR3064A

Xilinx
Part Number XCR3064A
Manufacturer Xilinx
Description 64 Macrocell CPLD
Published Jul 8, 2008
Detailed Description APPLICATION NOTE 0 R XCR3064A: 64 Macrocell CPLD With Enhanced Clocking 0 14* DS037 (v1.1) February 10, 2000 Product...
Datasheet PDF File XCR3064A PDF File

XCR3064A
XCR3064A


Overview
APPLICATION NOTE 0 R XCR3064A: 64 Macrocell CPLD With Enhanced Clocking 0 14* DS037 (v1.
1) February 10, 2000 Product Specification Features Industry's first TotalCMOS™ PLD - both CMOS design and process technologies • Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed • 3V, In-System Programmable (ISP) using a JTAG interface - On-chip superVoltage generation - ISP commands include: Enable, Erase, Program, Verify - Supported by multiple ISP programming platforms www.
DataSheet4U.
com - Four pin JTAG interface (TCK, TMS, TDI, TDO) - JTAG commands include: Bypass, Idcode • High speed pin-to-pin delays of 7.
5 ns • Ultra-low static power of less than 100 µA • ...



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