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LH543621

Part Number	LH543621
Manufacturer	Sharp Electrionic Components
Description	512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO
Published	Mar 22, 2005
Detailed Description	LH543611/21 FEATURES • Pin-Compatible and Functionally • • • • • • • • • • • • • • • • • • • • • • • • • Upwards-Compati...
Datasheet	LH543621 PDF File

Overview

LH543611/21 FEATURES • Pin-Compatible and Functionally • • • • • • • • • • • • • • • • • • • • • • • • • Upwards-Compatible with Sharp LH5420 and LH543601, but Deeper Expanded Control Register that is Fully Readable as well as Writeable Fast Cycle Times: 18/20/25/30/35 ns Improved Input Setup and Flag Out Timing Two 512 × 36-bit FIFO Buffers (LH543611) or Two 1024 × 36-bit FIFO Buffers (LH543621) Full 36-bit Word Width Selectable 36/18/9-bit Word Width on Port B; Selection May be Changed Without Resetting the BiFIFO Programmable Byte-Order Reversal – ‘Big-Endian ↔ Little-Endian Conversion’ Independently-Synchronized (‘Fully-Asynchronous’) Operation of Port A and Port B ‘Synchronous’ Enable-Plus-Clock Control at Both Ports R/W, Enable, Request, and Address Control Inputs are Sampled on the Rising Clock Edge Synchronous Request/Acknowledge ‘Handshake’ Capability; Use is Optional Device Comes Up Into a Known Default State at Reset; Programming is Allowed, but is not Required Asynchronous Output Enables Five Status Flags per Port: Full, Almost-Full, Half-Full, Almost-Empty, and Empty All Flags are Independently Programmable for Either Synchronous or Asynchronous Operation Almost-Full Flag and Almost-Empty Flag Have Programmable Offsets Mailbox Registers with Synchronized Flags Data-Bypass Function Data-Retransmit Function Automatic Byte Parity Checking with Programmable Parity Flag Latch Programmable Byte Parity Generation Programmable Byte, Half-Word, or Full-Word Oriented Parity Operations 8 mA-IOL High-Drive Three-State Outputs with Built-In Series Resistor TTL/CMOS-Compatible I/O Space-Saving PQFP and TQFP Packages 512 × 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO FUNCTIONAL DESCRIPTION The LH543611 and LH543621 contain two FIFO buffers, FIFO #1 and FIFO #2.
These operate in parallel, but in opposite directions, for bidirectional data buffering.
FIFO #1 and FIFO #2 each are organized as 512 or 1024 by 36 bits.
The LH543611 and LH543621 are ideal either fo...

Similar Datasheet

LH543601 256 x 36 x 2 Bidirectional FIFO - Sharp Electrionic Components
LH543611 512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO - Sharp Electrionic Components
LH543620 1024 x 36 Synchronous FIFO - Sharp Electrionic Components
LH543621 512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO - Sharp Electrionic Components

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