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HD74LV2GT157A

Part Number	HD74LV2GT157A
Manufacturer	Renesas Technology
Description	2-channle Multiplexer / CMOS Logic Level Shifter
Published	Jul 3, 2009
Detailed Description	www.DataSheet4U.com HD74LV2GT157A 2-channle Multiplexer / CMOS Logic Level Shifter REJ03D0150–0200Z (Previous ADE-205-6...
Datasheet	HD74LV2GT157A PDF File

Overview

www.
DataSheet4U.
com HD74LV2GT157A 2-channle Multiplexer / CMOS Logic Level Shifter REJ03D0150–0200Z (Previous ADE-205-686A (Z)) Rev.
2.
00 Oct.
23.
2003 Description The HD74LV2GT157A has 2–channel multiplexer in 8 pin package.
The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.
0 V CMOS Logic to 5.
0 V CMOS Logic or from 1.
8 V CMOS logic to 3.
0 V CMOS Logic while operating at the high-voltage power supply.
Low voltage and high-speed operation is suitable for the battery powered products (e.
g.
, notebook computers), and the low power consumption extends the battery life.
Features • The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• TTL compatible input level.
Supply voltage range : 3.
0 to 5.
5 V Operating temperature range : –40 to +85°C • Logic-level translate function 3.
0 V CMOS logic → 5.
0 V CMOS logic (@VCC = 5.
0 V) 1.
8 V or 2.
5 V CMOS logic → 3.
3 V CMOS logic (@VCC = 3.
3 V) • All inputs VIH (Max.
) = 5.
5 V (@VCC = 0 V to 5.
5 V) All outputs VO (Max.
) = 5.
5 V (@VCC = 0 V) • Output current ±6 mA (@VCC = 3.
0 V to 3.
6 V), ±12 mA (@VCC = 4.
5 V to 5.
5 V) • All the logical input has hysteresis voltage for the slow transition.
• Ordering Information Part Name HD74LV2GT157AUSE Package Type SSOP-8 pin Package Code TTP-8DBV Package Abbreviation US Taping Abbreviation (Quantity) E (3,000 pcs/reel) Rev.
2.
00, Oct.
23.
2003, page 1 of 9 www.
DataSheet4U.
com HD74LV2GT157A Outline and Article Indication • HD74LV2GT157A Index band Lot No.
Y M W T 5 7 SSOP-8 Marking Y : Year code (the last digit of year) M : Month code W : Week code Function Table Inputs STB H L L L L H : High level L : Low level X : Immaterial SEL X L L H H A X L H X X B X X X L H Outputs Y L L H L H Y H H L H L Rev.
2.
00, Oct.
23.
2003, page 2 of 9 www.
DataSheet4U.
com HD74LV2GT157A Pin Arrangement A 1 8 VCC B 2 7 STB Y 3 6...

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HD74LV2GT157A 2-channle Multiplexer / CMOS Logic Level Shifter - Renesas Technology

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