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ICS843002I-72

Part Number	ICS843002I-72
Manufacturer	Integrated Device Technology
Description	FEMTOCLOCKS VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
Published	Mar 27, 2010
Detailed Description	www.DataSheet4U.com FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR ICS843002I-72 GENERAL DESCRIPTION...
Datasheet	ICS843002I-72 PDF File

Overview

www.
DataSheet4U.
com FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR ICS843002I-72 GENERAL DESCRIPTION The ICS843002I-72 is a member of the IC S HiperClockS™ family of high performance clock HiPerClockS™ solutions from IDT.
The ICS843002I-72 is a PLL based synchronous clock generator that is optimized for WCDMA channel card applications where jitter attenuation and frequency translation is needed.
The device contains two internal PLL stages that are cascaded in series.
The first PLL stage uses a VCXO which is optimized to provide reference clock jitter attenuation and to be jitter tolerant, and to provide a stable reference clock for the second PLL stage.
The second PLL stage provides additional frequency multiplication (x32), and it maintains low output jitter by using a low phase noise FemtoClock™ VCO.
The device performance and the PLL multiplication ratios are optimized to support WCDMA applications.
The VCXO requires the use of an external, inexpensive pullable c...

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