S19233
10 GbE/Fibre Channel/SONET/SDH/FEC Dual CDR
The system circuitry consists of a highspeed phase detector, clock dividers, and equalization circuitry. The device utilizes on-chip clock recovery/clock clean-up PLL components that allow the use of a slower external clock reference, 155.52 MHz (or equivalent FEC/10GbE/ 10 Gbps FC rates), in support of exis...
