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P3P623S05A

ON Semiconductor
Part Number P3P623S05A
Manufacturer ON Semiconductor
Description Timing-Safe Peak EMI Reduction IC
Published Feb 17, 2011
Detailed Description P3P623S05A/B and P3P623S09A/B Timing-Safe™ Peak EMI Reduction IC General Features • Clock distribution with Timing-Safe...
Datasheet PDF File P3P623S05A PDF File

P3P623S05A
P3P623S05A


Overview
P3P623S05A/B and P3P623S09A/B Timing-Safe™ Peak EMI Reduction IC General Features • Clock distribution with Timing-Safe™ Peak EMI Reduction • Input frequency range: 20MHz - 50MHz • Multiple low skew Timing-safe™ Outputs: P3P623S05: 5 Outputs P3P623S09: 9 Outputs • Supply Voltage: 3.
3V±0.
3V • Packaging Information: P3P623S05: 8 pin TSSOP P3P623S09:16 pin TSSOP • True Drop-in Solution for Zero Delay Buffer All outputs have less than 200pS of cycle-to-cycle jitter.
The input and output propagation delay is guaranteed to be less than ±350pS, and the output-to-output skew is guaranteed to be less than 250pS.
Refer “Spread Spectrum Control and Input-Output Skew Table” for deviations and Input-Output Skew for P3P623S05A/B and P3P623S09A/B devices.
P3P623S05/09 operates from a 3.
3V supply and is available in TSSOP package, as shown in the ordering information table.
Multiple P3P623S05 / P3P623S09 devices can accept the same input clock and distribute it.
In this case, the skew between the outputs of the two devices is guaranteed to be less than 700pS.
the CLKIN pin.
The PLL feedback is on-chip and is obtained from the CLKOUT pad, internal to the device.
Functional Description P3P623S05/09 is a versatile, 3.
3V Zero-delay buffer designed to distribute Timing-Safe™ clocks with Peak EMI reduction.
P3P623S05 is an eight-pin version, accepts one reference input and drives out five low-skew Timing-Safe™ clocks.
P3P623S09 accepts one reference input and drives out nine low-skew Timing-Safe™ clocks.
All parts have on-chip PLLs that lock to an input clock on Application P3P623S05/09 is targeted for use in Displays and memory interface systems.
General Block Diagram PLL CLKIN CLKOUT PLL MUX CLKOUT CLKA1 CLK1 CLK2 CLK3 CLKIN CLKA2 CLKA3 P3P623S05A/B CLKA4 CLK4 S2 Select Input Decoding CLKB1 CLKB2 CLKB3 www.
DataSheet4U.
com S1 P3P623S09A/B CLKB4 ©2010 SCILLC.
All rights reserved.
July 2010 – Rev.
1 Publication Order Number: P3P623S05/D P3P623S05A/B and P3P623S09A/B Spr...



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