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HEF4510B

Part Number	HEF4510B
Manufacturer	NXP
Description	BCD up/down counter
Published	Mar 23, 2005
Detailed Description	INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family ...
Datasheet	HEF4510B PDF File

Overview

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4510B MSI BCD up/down counter Product speciﬁcation File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product speciﬁcation BCD up/down counter DESCRIPTION The HEF4510B is an edge-triggered synchronous up/down BCD counter with a clock input (CP), an up/down count control input (UP/DN), an active LOW count enable input (CE), an asynchronous active HIGH parallel load input (PL), four parallel inputs (P0 to P3), four parallel outputs (O0 to O3), an active LOW terminal count output (TC), and an overriding asynchronous master reset input (MR).
Information on P0 to P3 is loaded into the counter while PL is HIGH, independent of all other input conditions except the MR input, which must be LOW.
With PL LOW, the counter changes on the LOW to HIGH transition...

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