DatasheetsPDF.com

H5TQ2G83DFR-xxJ

Hynix Semiconductor
Part Number H5TQ2G83DFR-xxJ
Manufacturer Hynix Semiconductor
Description 2Gb DDR3 SDRAM
Published Jun 5, 2014
Detailed Description 2Gb DDR3 SDRAM 2Gb DDR3 SDRAM Lead-Free&Halogen-Free (RoHS Compliant) H5TQ2G83DFR-xxC H5TQ2G63DFR-xxC H5TQ2G83DFR-xxI ...
Datasheet PDF File H5TQ2G83DFR-xxJ PDF File

H5TQ2G83DFR-xxJ
H5TQ2G83DFR-xxJ


Overview
2Gb DDR3 SDRAM 2Gb DDR3 SDRAM Lead-Free&Halogen-Free (RoHS Compliant) H5TQ2G83DFR-xxC H5TQ2G63DFR-xxC H5TQ2G83DFR-xxI H5TQ2G63DFR-xxI H5TQ2G83DFR-xxJ H5TQ2G63DFR-xxJ H5TQ2G83DFR-xxL H5TQ2G63DFR-xxL * SK Hynix reserves the right to change products or specifications without notice.
Rev.
1.
1 / May.
2012 1 http://www.
Datasheet4U.
com Revision History Revision No.
0.
01 0.
02 0.
03 0.
04 0.
05 0.
06 0.
07 History Preliminary version release Add temperature information in feature update operation frequency update IDD 1600,1866,2133 update IDD data update IDD data (x8) update Pakage Dimension (x16) - Corrected Pakage Dimension (Page 34 , 78 Balls to 96Balls) update IDD data Official Version Release Official Version Release & Add L/J Part Delete Comments regarding IDD6TC & New revised logo (Hynix to SK hynix) Draft Date July.
2011 Aug.
2011 Oct.
2011 Nov.
2011 Nov.
2011 Dec.
2011 Dec.
2011 Remark Preliminary Preliminary Preliminary Preliminary Preliminary Preliminary Preliminary 0.
08 0.
09 1.
0 1.
1 Feb.
2012 Mar.
2012 Apr.
2012 May.
2012 Page 24, all IDD specs are completed Deleted “Preliminary” Add L/J Part support Page 12/17/24 Rev.
1.
1 / May.
2012 2 Description The H5TQ2G83DFR-xxC, H5TQ2G63DFR-xxC,H5TQ2G83DFR-xxI, H5TQ2G63DFR-xxI, H5TQ2G83DFRxxL,H5TQ2G63DFR-xxL,H5TQ2G83DFR-xxJ,H5TQ2G63DFR-xxJ are a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.
SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.
While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
Device Features and Ordering Information FEATURES • VDD=VDDQ=1.
5V +/- 0.
075V • Fully differentia...



Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)