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HD74HC137

Hitachi Semiconductor
Part Number HD74HC137
Manufacturer Hitachi Semiconductor
Description 3-to-8-line Decoder/Demultiplexer
Published Mar 23, 2005
Detailed Description HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HC137 implements a three-to-eight li...
Datasheet PDF File HD74HC137 PDF File

HD74HC137
HD74HC137

Overview
HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs.
When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches.
As long as GL remains high no address changes will be recognized.
Output enable controls, G1 and G2, control the state of the outputs independently of the select or latch-enable inputs.
All of the outputs are high unless G1 is high and G2 is low.
The HD74HC137 is ideally suited for the implementation of glitchfree decoders in stored-address applications in bus oriented systems.
Features • • • • • High Speed Oper...


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