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HCS112MS

Intersil Corporation
Part Number HCS112MS
Manufacturer Intersil Corporation
Description Radiation Hardened Dual JK Flip-Flop
Published Mar 23, 2005
Detailed Description HCS112MS September 1995 Radiation Hardened Dual JK Flip-Flop Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (S...
Datasheet PDF File HCS112MS PDF File

HCS112MS
HCS112MS

Overview
HCS112MS September 1995 Radiation Hardened Dual JK Flip-Flop Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW CP1 1 KA 2 JA 3 SA 4 QA 5 16 VCC 15 RA 14 RB 13 CPB 12 KB 11 JB 10 SB 9 QB Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.
5V to 5.
5V • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min • Input Current Levels Ii ≤ 5µA at VOL, VOH QA 6 QB 7 GND 8 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C TOP VIEW CP1 KA JA SA QA QA QB GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC RA RB CPB KB JB SB QB Description The Intersil HCS112MS is a Radiation Hardened dual JK flip-flop with set and reset.
The output changes state on the negative going transition of the clock pulse.
Set and reset are accomplished asynchronously by a logic low input level.
The HCS112MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.
This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS112MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Ordering Information PART NUMBER HCS112DMSR HCS112KMSR HCS112D/Sample HCS112K/Sample HCS112HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTE...


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